United States
SiC chips are displacing their incumbent silicon counterparts in several high-volume power applications. As SiC market share continues to grow, the industry is lifting remaining barriers to mass commercialization including the higher-than-silicon chip cost that increases disproportionately with area, defects that limit chip yield and area, reliability and ruggedness concerns, and the need for a trained workforce to skillfully insert SiC devices into power electronics circuits.
With respect to fabrication, the SiC industry is successfully leveraging the fully-depreciated legacy silicon fab infrastructure, and is making the relatively small financial investments that allow mature silicon fabs to process SiC. Consequently, SiC chip fabrication alongside silicon has emerged as a cost-effective model that exploits silicon manufacturing economies of scale. In this tutorial, key aspects of SiC fabrication technology will be summarized with an emphasis on non-silicon-compatible processes streamlined for mass SiC manufacturing. The latter include dry etching SiC, substrate thinning, heated implantation and high temperature annealing, CTE-matched metallization, ohmic contact formation, improved gate oxide interface quality, transparent wafer handling, as well as edge termination techniques that maximize blocking voltage.